Abstract
The system described incorporates silicon bipolar, thick-film hybrid, and CMOS process technologies. A sampler chip providing filtered pulses to four analog-to-digital converter chips on one thick-film hybrid can provide 8 b of resolution and a 2-Gsample/s sampling rate. A novel sampling process called sample and filter is used to reduce the bandwidth requirements of post-sampling circuitry. Two thick-film hybrids with interleaved sample timing were used to obtain a 4-Gsample/s sample rate, 2-GHz bandwidth, and eight effective bits at DC. The goals for system functionality, resolution, bandwidth, and noise were all met with the initial prototypes of the chips and the thick-film hybrid.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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