A 4.5–7.5 GHz highly integrated transceiver front‐end for UWB application

Abstract

AbstractIn this letter, a 4.5–7.5 GHz highly integrated transceiver front‐end, incorporating two single‐pole three‐throw (SP3T) transmit/receive (T/R) switches, a low‐noise amplifier (LNA), a power amplifier (PA), and a bypass path for UWB positioning and communication systems applications, is reported. The mode switches among transmitting, receiving, and bypass are achieved by utilizing two control voltages through integrating a 2–4 decoder. Meanwhile, to ensure low‐power dissipation in different modes, the LNA and PA work in different modes (enable or disable) for transmitting and receiving status while both the LNA and PA are disabled for bypass mode. Fabricated by using 0.5‐μm GaAs pHEMT process, the presented FEM achieves 20‐dB gain, and 2.5‐dB typical noise figure for receiving mode, 8‐dB gain, and 16‐dBm OP1dB for transmitting mode, and 1.8 dB insertion loss for bypass mode, with a compact chip area of 1.5 mm × 1.7 mm. To the best of authors' knowledge, the presented circuits are the highest integrated and smallest chip area transceiver front‐end for UWB application among all previously reported UWB‐related RF front‐end chips.