Abstract

This letter presents the design and characterization results of a multi-octave power amplifier (MOPA) fabricated in a 0.13- $\mu \text{m}$ SiGe-BiCMOS technology. The single-stage power amplifier is implemented as the stack of a cascode amplifier combining broadband input matching network with resistive feedback, and a common-base amplifier with base capacitive feedback. Measurement results show that the design delivers a peak saturated output power level of 20.2 dBm, with output of 1 dB compression at 19.4 dBm. The measured 3-dB power bandwidth is from 4 to 32 GHz, covering three octaves. The corresponding power fractional bandwidth (PFBW) is 156%. The measured peak power added efficiency is 20.6%, and peak small-signal gain is 18.6 dB. The fabricated integrated circuit occupies an area of 0.71 mm2. To compare state-of-the-art MOPAs, the power amplifier figure of merit defined by the international technology roadmap for semiconductors (ITRS) is modified to include PFBW and area. To the best of authors’ knowledge, the presented design achieves the highest figure of merit among multi-octave PAs in a silicon-based integrated circuit technology reported in the literature.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call