A 4–17 GHz Darlington Cascode Broadband Medium Power Amplifier in 0.18-$\mu$m CMOS Technology

Abstract

This letter presents a broadband medium power amplifier in 0.18-μm CMOS technology. The Darlington cascode topology is used to achieve wide bandwidth, flat gain and power frequency response. For wideband matching consideration, an interstage inductor and series peaking RL circuit are adopted. An output high pass matching circuit is used to maintain gain and power flatness at high frequency. The measured results show that the proposed PA demonstrates a gain of 10 dB from 4 to 17 GHz with less than 2-dB ripple, and a saturation output power of 16 to 18 dBm with PAE of better than 10% and power consumption of 306 mW. The chip size is only 0.67 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .