Abstract
A front-end CMOS bandpass filter is proposed for applications of 3.6 GHz RF wireless receivers. In the proposed filter, the Q-enhancement technique is used to overcome low-Q characteristics of CMOS on-chip inductors. A 6th order bandpass filter with a wide pass band and a high image rejection was built by cascading three stages of 2nd order Q-enhanced filters. An experimental chip designed by standard 0.18 /spl mu/m CMOS technology occupies an area of 900/spl times/900 /spl mu/m/sup 2/. Post-layout simulation results show a high performance filter: a tunable Q from 25 to 50, a tunable center frequency from 3.53 GHz to 3.67 GHz, an image-rejection of 60 dB, a 30 dB voltage gain, a 10 dB noise figure, an output 1 dB compression point of -32 dBm with a -15 dBm third-order input intercept point while consuming a 120 mW of power.
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