A 32-channels analog multiplexer with crosstalk compensation technique in 45 nm CMOS

Abstract

This paper presents a multiplexer that is capable of modulating 32-channels analog signal, which is a promising approach to simplify transmission system. An 8-channels prototype multiplexer with integral functionality and non-ideal factors is fabricated in 45 nm CMOS with area of 0.59 mm2, and verified in a QAM-256 system with 1.2V supply. The proposed multiplexer employs a semi-tree structure to achieve compromise between scale and speed. To relieve adverse effect caused by crosstalk between channels, the auxiliary reset compensation circuit combined with a dedicated timing sequence is utilized. Additionally, the proposed high-speed gate voltage bootstrap switch and high-bandwidth input buffer ensure that the signal remains linear during transmission. In the experimental result, the multiplexer can achieve a pulse width of at least 77ps in 8Gbps code rate, and the root mean square error due to nonlinearity between differential input and output is 1.869 %. The error vector magnitude (EVM) obtained by analyzing output versus input of multiplexer is less than 1.413 %.