Abstract
A high speed 1-kbit ECL RAM with a typical access time of 2.7 ns and power dissipation of 500 mW has been developed, using a novel LSI fabrication process technology, together with a new reference circuit configuration. This paper describes an integrated transistor structure using this novel process technology, fabrication steps, a new sense circuit and performance of the RAM.
Full Text 
Sign-in/Register to access full text options
Sign-in/Register to access full text options 
Paper version not known
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
