Abstract

A spread-spectrum clock generator (SSCG) with self-calibration circuit (SCC) is presented in this paper. By the use of self-calibration scheme, exploited the proposed linear circuit and a SCC, the gain of Kvco can be effectively reduced and the jitter performance is improved. Moreover, the proposed architecture provides an alternative technique for low Kvco instead of the commonly used methods for voltage-control oscillator (VCO) calibration. The SCC-based SSCG ensures phase locking under the process, voltage and temperature (PVT) variations. For spread-spectrum clocking, the digital MASH delta-sigma modulator and a 33-kHz triangular addressor is used. The proposed SSCG generates an output clock of 3 GHz and approximate 5000-ppm down spreading with a triangular-modulated shape. The SSCG has been designed in TSMC 0.18 μm CMOS technology. Operating at a 3-GHz clock rate, the peak-to-peak jitter of non spread-spectrum is 3.85 ps. The electromagnetic interference (EMI) reduction is larger than 20 dB with a triangular-modulated frequency of 3–2.985 GHz.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call