A 29.5 dBm OOB IIP3 TIA Based on a Two-Stage Pseudo-Differential OTA With R-C Compensation and Cascode Negative Resistance

Abstract

This paper presents a highly linear and wideband transimpedance amplifier (TIA) suitable for 5G Sub-6 GHz surface acoustic wave (SAW) filter-less receivers (RX). It is known that for the baseband TIA in a SAW-less RX, the high out-of-band (OOB) linearity is necessary to cope with huge OOB blockers. In other words, the input impedance ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Z_in</i> ) of the TIAs should be as low as possible, which in turn necessitates high-gain, large-bandwidth (BW) operational transconductance amplifiers (OTA). In this work, a pseudo-differential two-stage OTA with 46 dB open-loop gain and 1 GHz unity-gain loop bandwidth (UGLB) is designed at low supply voltage (Vdd). To stabilize the differential mode (DM) loop, the phase margin (PM) is compensated with the zeros generated by the series of resistors and capacitors (R-C), and the gain margin is improved by the feed-forward technique. To stabilize the common mode (CM) loop without the degradation of the DM gain, a wideband common mode rejection (CMR) technique named cascode negative resistance (CNR) is proposed. This TIA prototype is implemented in a 40 nm low-power (LP) CMOS technology. The measured results show that the TIA achieves 56 MHz BW and 29.5 dBm OOB IIP3. The input impedance is below 29Ω in the concerned frequency range and the in-band (IB) input referred noise (IRN) is 120 <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">uV_RMS</i> . The total chip power consumption is around 8.5 mW at 1.2 V supply voltage and the core area is as small as 0.015 <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mm</i> <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .