A 28 nm, 475 mW, 0.4-to-1.7 GHz embedded transceiver front-end enabling high-speed data streaming within home cable networks

Abstract

A 28 nm CMOS Software-Defined Transceiver (SDTRX) enabling High-Speed Data (HSD) streaming, including Ultra HD TV, within home cable networks is presented. By making efficient use of available cable bandwidth, the SDTRX dynamically handles up to 1024QAM OFDM-modulated HSD streams. This paper addresses SDTRX system-level design methodology as the key driver in enabling performance optimization for achieving a wide frequency range of operation at the lowest power and area consumption. By employing an optimized architecture constructed on available state-of-the art 28 nm functional building blocks, the monolithic SDTRX consists of a mixer-based harmonic rejection RX with a DAC-based TX and a smart PLL system. It operates over a 0.4-to-1.7 GHz frequency range while consuming less than 475 mW in half-duplex mode. Moreover, by developing a simple TX-RX loopback circuit, the system is enabled to efficiently calibrate TX output power and to remove the need for a dedicated external pin. This low-cost SDTRX is embedded in various 28 nm CMOS multimedia SoCs and is, to the authors' knowledge, the first reported transceiver front end to enable true high-speed data streaming within home cable networks.