Abstract
In this paper, we present a design of a CMOS current conveyor. Thus, the first step in our design was to improve static and dynamic behavior of second generation current conveyors. The translinear implementation in CMOS technology was first studied. We notice that it presents a lower RX than those of Y and Z. However, this value (about 1 k/spl Omega/) may reduces the RF design's performances such as filters and oscillators, so it became necessary to make an implementation of a new improved CCII structure for RF design's implementation. This new structure is used as a basic building block of a tunable current and voltage mode band-pass filter. The Q-factor and the central frequency can be electronically controlled by mean of DC bias current. To validate this result, a Pspice simulation results are presented showing very interesting frequency and Q factor performances (the central frequency is tunable in the range of 1.2-1.6 GHz and Q from 80 to 313).
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