A 256 bit 12L RAM with a high‐voltage analog circuit

Abstract

AbstractRecently, it has become desirable for the analog‐digital LSI to have ROM, PLA, or RAM in addition to the conventional random logic circuits: I2L described in this paper is suitable for these purposes with its capability to be on‐chip with high‐voltage analog circuits. to suppress the circuit area increase which is the largest problem in coexistence with the high‐voltage devices, this RAM has a simplified peripheral circuit by an extensive use of I2L devices. Also, it has a circuit configuration which minimizes the number of device isolation regions. As operating features, it uses the memory cell read‐out transistor in the reverse mode during the signal read‐out in association with the simplification of the circuit configuration. Thus, it is possible to set up the power consumption according to its use. As a result of the fabrication of 256 bit RAM using the process technology for high‐voltage analog circuits (epitaxial layer: 1 ω cm, 10 μm, device‐isolation distance: 20 μm), npn transistor breakdown voltage BVCEO of 22 V, RAM area of 1.7 × 3.4 mm2, minimum access time 600 ns, and minimum write pulsewidth of 440 ns have been obtained.