A 25-nm MOSFET with an Electrically Induced Source/Drain

Abstract

As MOSFET devices are scaled down to gate lengths of 50 nm and beyond, the requirements for the bodydoping concentration, the gate-oxide thickness, and source/drain doping profiles to control short-channel effects become increasingly difficult to meet [1]. A low channel impurity concentration is desirable since it gives a large carrier mobility and a small threshold voltage fluctuation for a random dopant distribution. However, the threshold voltage of this kind of device depends mainly on the work function of the gate material [2]. This paper reports on a new 25-nm MOSFET structure utilizing n polysilicon floating gate spacers (FGS). In the 25-nm MOSFET with a thin gate oxide, control of the threshold voltage by increasing depletion charges has many disadvantages, like a carrier mobility degradation, a large threshold voltage fluctuation due to a random dopant distribution and a large subthreshold slope. So the work function of the gate material is adjusted to control the threshold voltage. The work function of the main gate is assumed to be 4.5 eV to obtain the designed threshold voltage value of 0.3 V with a low channel doping concentration. Also, the main gate is made of materials whose work functions are close to