Abstract
A data acquisition IC has been developed for digital storage oscilloscopes (DSOs). The entire DSO front-end except an input attenuator was integrated using 1 /spl mu/m double-poly, double-metal (DPDM) CMOS process technology. In the analog-to-digital conversion, a time-interleaved successive approximation architecture effectively enables both 25 Msps 8-bit and 10 Msps 10-bit operations. The input signal conditioner consists of a variable gain amplifier (VGA) and a 2nd-order programmable low-pass filter (LPF) using the folded-cascode structures with current feedback circuits. Their overall gain is externally controllable from 12 dB to 38 dB, and their bandwidth is programmable at 500 kHz, 5 MHz, and 25 MHz. The chip consumes 220 mW at the 25 Msps operating condition and less than 8 mW in the power-down mode from a single 5 V supply.
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