Abstract
In this paper, a 240 GHz 16 Gbps QPSK transmitter is demonstrated in 65 nm bulk CMOS process. The transmitter chain employs an 80 GHz local oscillator and a modulator to generate the data that is amplified by a class-E switching power amplifier. The amplified signal then drives the 240 GHz tripler to generate the required modulated data. By using on-chip slotted loop antennas, the transmitter achieves an EIRP of 1 dBm. A maximum data rate of 16 Gbps is achieved with a transmitter efficiency of 14 pJ/bit.
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