A 24-GHz Source-Degenerated Tunable Delay Shifter With Negative Group Delay Compensation

Abstract

A true time delay shifter is fabricated in TSMC 65-nm CMOS low power technology for 24-GHz vehicle radar application. Its mechanism of source degenerated negative group delay compensation is proposed for flat group delay generation and tuning in a medium-wide 1.3-GHz instantaneous bandwidth, with simultaneously a reduced S21 of −6 ~ −9 dB (measured S21 excluding simulated extra insertion loss of packaging modeling and printed circuit board traces) compared to typical switched-line delay shifters. For 10-ps relative delay range, the variation is about 1–2 ps (max to 6 ps). For 17-ps range, the variation becomes 8–13 ps due to measurement issues. It consumes 16.3 mW at 1.2-V supply and 0.11-mm2 chip area. This topology is demonstrated to be a suitable and potential choice of delay shifter for medium-wideband time array system.