Abstract
Feasibility of 2.4 GHz RF CMOS receiver for low cost digital wireless communication for the 802.15.4 standard is demonstrated. The LNA, switch, and mixer architecture and design are described in the context of low cost and low power CMOS integrated circuits. Simulations with 0.28 /spl mu/m design kit shown 5 dB noise figure and 36 dB voltage gain for less than 30 mW power consumption. Additional considerations based on EM simulations to minimize substrate coupling and to avoid high frequency parasitic effects are also presented.
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