A 24 GHz Low-Noise Amplifier Using RF Junction Varactors for Noise Optimization and CDM ESD Protection in 90 nm CMOS

Abstract

This letter presents an ESD-protected 24 GHz low-noise amplifier (LNA) in 90 nm CMOS using RF junction varactors for noise optimization and ESD protection simultaneously. One of the junction varactors, inserted as an extra gate-source capacitance, provides an effective CDM ESD protection, and is also used for power-constrained simultaneous noise and input matching. The measured results demonstrate a 2.7 A (corresponding to a 4 kV HBM) and an 11.4 A ESD protection levels using transmission line pulse and very fast transmission line pulse tests, respectively. Under a power consumption of 9.1 mW, the ESD-protected LNA presents a NF of 2.9 dB and power gain of 15.2 dB at the center frequency of 24 GHz.