Abstract
A fully integrated 1.8 GHz CMOS power amplifier is presented in this paper. The proposed power amplifier consists of a three-stage cascade structure comprising a driver stage, a pre-distortion stage, and a power stage. The pre-distortion stage involves the use of two diode connected MOSFETs as a non-linearity generator to expand the 1dB compression point (P1dB) and enhance the power added efficiency (PAE) performance. The simulation result indicated that the circuit exhibited a power gain of 28.3 dB, an output power at the P1dB of 23.2 dBm, and a PAE of 32% under 3.3V supply. While applying an uplink LTE modulated signal, the amplifier delivers an average output power of 20.5 dBm.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.