Abstract
A high performance FIR (Finite Impulse Response) filter using RB (Redundant Binary) number system is designed. In the past, FIR filters were implemented by NB (Normal Binary) number system; therefore, the speed was limited due to carry propagation. We realize a fast FIR filter by utilizing the carry-free property of the RB system. A RBPP (RB Partial Product) generator circuit is devised without Booth's algorithm, so that the delay and complexity of the filter is reduced. The serious demerit of the RB system, RB-to-NB conversion delay, is effectively overcome by utilizing a pipeline architecture. The 8 tap programmable FIR filter is designed with this architecture. The chip is fabricated by using 0.65 /spl mu/m CMOS with 2-metal technology. The active area size is 2.6 mm/spl times/2.6 mm and the number of transistor is 27,000. The operating frequency is 230 MHz under the condition of 5 V supply voltage.
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