A 2-26 GHz MMIC power amplifier with low noise figure

Abstract

This paper describes the modeling, design, fabrication and performance of a monolithic 2/spl sim/26 GHz PHEMT power amplifier with low noise characteristic. By using a distributed circuit and series gate capacitors, the measured gain is 6.5/spl plusmn/0.5 dB with both in and out VSWR less than 2.0 in the broad band, and the measured output power is over 300 mW with 3.5/spl sim/5.5 dB noise figure in 2/spl sim/20 GHz frequency range. The amplifier is truly monolithic, with all matching and biasing and DC block circuitry included on the chip. The finished chip size is 3.2 mm/spl times/1.275 mm/spl times/0.1 mm.