Abstract
This article proposes a dual injection locking technique to significantly enhance the locking range (LR) of the injection-locked frequency tripler (ILFT). Compared with the conventional circuit topology that typically suffers from limited LR due to <inline-formula> <tex-math notation="LaTeX">$G_{m}$ </tex-math></inline-formula> degeneration, the proposed technique employs drain injection and source injection together to increase the LR, with power consumption increased only a little. Fabricated in standard CMOS 65-nm technology, the ILFT prototype measures a 39.4% LR at 0-dBm input power while consuming 8.16 mW from a 1-V supply. The chip area is 0.32 mm<sup>2</sup> including the pads. The proposed ILFT is applicable for local oscillation generation in the 5G transceiver.
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