Abstract
Due to the increased processing data rates, which is required in applications such as fifth-generation (5G) wireless networks, the battery power will discharge rapidly. Hence, there is a need for the design of novel circuit topologies to cater the demand of ultra-low voltage and low power operation. In this paper, a low-noise amplifier (LNA) operating at ultra-low voltage is proposed to address the demands of battery-powered communication devices. The LNA dual shunt peaking and has two modes of operation. In low-power mode (Mode-I), the LNA achieves a high gain (S21) of 18.87 dB, minimum noise figure ({NF}_{min.}) of 2.5 dB in the − 3 dB frequency range of 2.3–2.9 GHz, and third-order intercept point (IIP3) of − 7.9dBm when operating at 0.6 V supply. In high-power mode (Mode-II), the achieved gain, NF, and IIP3 are 21.36 dB, 2.3 dB, and 13.78dBm respectively when operating at 1 V supply. The proposed LNA is implemented in UMC 180 nm CMOS process technology with a core area of 0.40{mathrm{ mm}}^{2} and the post-layout validation is performed using Cadence SpectreRF circuit simulator.
Highlights
The current technology trends in the world of electronics and communication are focused on wireless, portable, and wearable devices such as Internet-of-Things (IoT)
It will be shown that the proposed low-noise amplifier (LNA) topology provides a scaling factor of (1 + A2 ) achieving proper gain, NF and linearity performance required by the IEEE 802.15.4 standard for wireless personal area network (WPAN) applications while operating at extremely low supply voltages
The proposed LNA’s post-layout performance is validated using UMC 180 nm CMOS process, and the results are discussed in the Sect. 3 and Sect. 4 concludes the work by highlighting the salient features
Summary
The current technology trends in the world of electronics and communication are focused on wireless, portable, and wearable devices such as Internet-of-Things (IoT). The current necessity in the electronics and communication industry is to design energy-harvesting RF circuits for low-power operation of the wireless, portable, and wearable devices. It can be noted that the gm is boosted by a factor of (1 + Av,CG ) leading to improved gain and noise performance of the CG based LNAs employing feedback. NF and linearity performance is vital for portable electronic devices, in this paper, an ultra-low power LNA topology employing cross-coupled positive feedback and dual shunt peaking is proposed. It will be shown that the proposed LNA topology provides a scaling factor of (1 + A2 ) achieving proper gain, NF and linearity performance required by the IEEE 802.15.4 standard for WPAN applications while operating at extremely low supply voltages. The proposed LNA’s post-layout performance is validated using UMC 180 nm CMOS process, and the results are discussed in the Sect. 3 and Sect. 4 concludes the work by highlighting the salient features
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