A 2.1 pJ/SOP 40nm SNN Accelerator Featuring On-chip Transfer Learning using Delta STDP

Abstract

This work introduces a neuromorphic chip featuring energy-efficient transfer learning capability using a new learning rule, Delta- Spike Time Dependent Plasticity (STDP). Delta STDP enables the neuromorphic chip to leverage on its previous knowledge to learn and to solve different but related tasks at a faster rate and with a limited number (few shots) of training samples. Compared to the unsupervised on-chip learning (OCL) rules, Delta STDP offers lower learning overheads as it has ∼20% lower memory utilization and is operated only on the last layer of the Spiking Neural Network (SNN). A test chip fabricated in 40nm demonstrates this on-chip learning concept using DVS gesture and MNIST datasets. It achieves an accuracy of >80% for DVS gesture (using 9.8K training samples) with the total energy/learning is 5.2J at 0.5V. For MNIST, using only 2K training samples, it attains an accuracy of 97% and this learning convergence rate is >10x the conventional OCLs. The total energy/learning for MNIST dataset is 8.6mJ at 0.5V. Overall, the chip consumes 2.1 pJ/SOP at 0.5V, which is 12.3x-91.4x lower compared to the existing state-of-the-art.