Abstract
A differential NAND-structured physically unclonable function (PUF) with 20F <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> area per bit is proposed for cost-effective Internet of Things applications. With the area-efficient NAND-array structure, a key bit is generated from a pair of minimum-sized nMOS transistors by effectively amplifying threshold voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> ) mismatch. By utilizing the near-threshold current of the examined transistors, high sensitivity to V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> variation, which is desired for stability, and faster operation than leakage current-based PUFs is achieved. An offset-compensated comparison scheme is provided to accurately determine the key value without bias. The proposed PUF achieves 0.06% BER and 0.53% unstable bits with TMV11 while reducing the area by an order of magnitude compared with state-of-the-art CMOS-based PUFs.
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