A 20 ~ 43 GHz VGA with 21.5 dB Gain Tuning Range and Low Phase Variation for 5G Communications in 65-nm CMOS

Abstract

This paper presents a broadband variable gain amplifier (VGA) with low phase variation in 65 nm CMOS technology. The mechanism of phase variation in CMOS VGA is analyzed. According to the analysis, the feedforward paths formed by parasitic capacitive and inductive couplings are one of the main factors that result in phase variation in CMOS VGA. In order to achieve low phase variation, a parasitic capacitor elimination technique is proposed to remove the feedforward path formed by gate-drain parasitic capacitor. Besides, an isolation enhancement layout technique is proposed to minimize the inductive coupling and parasitic capacitors in the layout of the variable gain stage. As results, the measured phase variation is 0.2° ~ 2° in 18 GHz ~ 37 GHz and 0.2° ~ 5.4° in 18 GHz ~ 45 GHz when the gain variation range is 21.5 dB. The measured peak gain is 14.5 dB with 3-dB bandwidth of 20 GHz ~ 43 GHz. The gain ripple in 3-dB bandwidth is < 2.5 dB. The noise figure and input-referred P1dB are 5.5 dB and -16.5 dBm in the maximum gain state, respectively. The chip consumes 30.8 mW from 1.1 V voltage supply and the core area is 370 um × 930 um.