A 2$\times$ Blind Oversampling FSE Receiver With Combined Adaptive Equalization and Infinite-Range Timing Recovery

Abstract

A 2 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times $ </tex-math></inline-formula> blind-oversampling, fractionally spaced equalizer (FSE) receiver is presented as an effective way to combine adaptive equalization and timing recovery in a single control loop. To additionally support plesiochronous clocking, the presented work realizes an infinite-range timing recovery using a set of two four-tap FSEs with a 0.5-UI timing offset, only one of which is selected to recover the data. The selection seamlessly alternates between the two, each time a 0.5-UI timing drift occurs. The optimal time to switch the selection is detected by observing the currently adapted FSE tap coefficients and its main cursor position. An equivalent timing recovery loop model is derived. A current-integrating summer and multi-input regenerative latch help the four-tap FSEs and four-tap decision-feedback equalizers (DFEs) achieve low-power dissipation, respectively. A prototype receiver fabricated in a 28-nm CMOS consumes 3.5 pJ/bit and 0.10 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> at 9 Gb/s while compensating for a 22-dB channel loss and 100-ppm frequency offset between the transmitted data and blind sampling clocks.