A 2.7 mW/Channel 48–1000 MHz Direct Sampling Full-Band Cable Receiver

Abstract

A direct sampling full-band capture (FBC) receiver for cable and digital TV applications is presented. It consists of a 0.18 μm BiCMOS low-noise amplifier (LNA) and a 28 nm CMOS direct RF sampling receiver based on a 2.7 GS/s analog-to-digital converter (ADC) embedded in a system-on-chip (SoC). Digital signal processing (DSP) plays critical roles to assist analog circuits in providing functionalities and enhancing performances, including digital automatic gain control (AGC), digital phase-locked loop (PLL), and digital ADC compensation. The receiver is capable of receiving 158 256 QAM channels from 48 to 1000 MHz simultaneously, achieving up to 10 Gb/s data throughput for data and video while exceeding Data over cable service interface specification (DOCSIS) and Society of Cable Telecommunications Engineers (SCTE) requirements. The CMOS receiver occupies $1 \text{ mm}^{2}$ area while consuming 300 mW. The LNA consumes 130 mW and occupies $3 \text{ mm}^{2}$ area. The total power dissipation from the receiver is 2.7 mW per 6 MHz channel when capturing the entire cable spectrum.