Abstract

This letter presents a novel architecture of signal source suitable for the 77 GHz frequency-modulated continuous-wave (FMCW) radar transceiver. By using a conventional 19 GHz integer- N phase-locked loop (PLL) with a frequency modulation loop, the required 19 GHz sinusoidal signal and 19-19.5 GHz FMCW frequency chirp can be generated simultaneously without excessive hardware overhead. Fabricated in a standard 65 nm CMOS process, the proposed circuit consumes a dc power of 68 mW from a supply voltage of 1.2 V.

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