Abstract
In this paper, a low-voltage, low-power, ultra-wideband, and improved linear up-conversion folded mixer with a coverage range of 1.5–7 GHz is presented. The mixer is designed with 0.18 μm CMOS technology. The folded method is adopted to reduce the supply voltage as well as the DC power consumption. The linearity of the mixer is enhanced using the multiple-gate transistor (MGTR) topology. The transconductance stage is designed with transistors of different sizes, namely, a main transistor and an auxiliary transistor. The gate voltage of the auxiliary transistor is adjusted to change the distortion coefficient such that the nonlinearity of the main transistor is compensated. The up-conversion mixer can achieve a measured conversion gain of 7.2–11.2 dB. The third-order input-intercept point (IIP3) is –6 to –3.5 dBm, and the DC power consumption is 5.8 mW for a supply voltage of 1 V. The measured LO-to-IF and LO-to-RF port-to-port isolations are 37–53 dB and 30–39 dB, respectively. The measured IF-to-RF port-to-port isolation is 36–60 dB. The chip size of the up-conversion mixer, including the pad frames, is 1.32 mm2.
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