Abstract
The design of a 12.77-MHz on-chip RC relaxation oscillator with digital compensation technique is presented. To maintain the frequency stability versus temperature and supply voltage variations, loop delay tuning by a digital feedback loop is developed in this system. In order to generate an on-chip reference for digital calibration, a replica comparator is added. The on-chip relaxation oscillator is fabricated in 0.18- $\mu\text{m}$ CMOS process. The measured output frequency variation is 31 ppm/°C across −30 to 120 °C temperature range after compensation. The frequency variation over the supply voltage from 0.6 V to 1.1 V is ±0.5%/V. The measured total power consumption is 56.2 $\mu\text{W}$ at 0.9-V supply voltage when the digital compensation blocks are enabled. After digital compensation, the compensation blocks can be shutdown for power saving, and the main oscillator consumes only 12.8 $\mu\text{W}$ .
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More From: IEEE Transactions on Circuits and Systems I: Regular Papers
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