A 125-klx Background Light Subtraction Architecture for 2-D and Time-of-Flight 3-D Cameras

Abstract

In this paper, an in-pixel background light (BGL) subtraction architecture is presented for indoor/outdoor 2-D and 3-D imaging. The subtraction is performed using a pulsed modulation technique used in time-of-flight cameras. Mostly BGL subtraction is done using two capacitors. However, two capacitors cause mismatch effects; therefore, a single capacitor approach is proposed. Using a single capacitor, the BGL subtraction and distance estimation are performed in three operational phases. Hence, the proposed architecture can be used in applications where high-speed depth imaging is required. An image sensor with $24\times24$ pixel array is designed with 48- $\mu \text{m}$ pixel pitch and 17.36% fill factor. The measurement results of the chip fabricated in AMS 0.35- $\mu \text{m}$ CMOS OPTO process show up to 125-klx BGL subtraction without using an optical filter with a background-to-signal ratio of 40 dB.