Abstract
A digitally programmable-gain amplifier (PGA) is realized using a 0.35 /spl mu/m CMOS technology. Constant bandwidth and high linearity are achieved by using a current-mode amplifier with resistor-network feedback. The PGA has a voltage gain varying from 0 dB to 19 dB with a bandwidth of 125 MHz. With 1 Vpp output, the third-order intermodulation (IM3) of the PGA is -86 dB at 10 MHz and -59 dB at 80 MHz. The distortion is also insensitive to the gain change. The circuit dissipates 21 mW from a 3.3 V supply.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
