Abstract

Emerging sub-mW near-threshold-voltage system-on-chips require new power management architecture that can create multiple voltage domains with the fewest possible off-chip passives. To fulfill this need, we propose an ultra-low-power single-inductor–multiple-output dc–dc buck converter in a 65-nm CMOS process. Featuring a comparator-based output switch controller and a digital pulse-width modulation controller for ultra-low feedback latency, this dc–dc converter takes 1-V input voltage and produces ten independent output voltages from 0.4 to 0.8 V at the aggregated power delivery of 0.583 mW. It has ten 200-pF on-chip output capacitors and one 82- $\mu \text{H}$ off-chip inductor and achieves the peak power conversion efficiency of 83.4%.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call