Abstract
An experimental 10.7-MHz switched-capacitor bandpass filter is demonstrated that exhibits a 400-kHz bandwidth with a 42-MHz sampling rate. Basic design issues of such high-frequency filters are also addressed with emphasis on dynamic range and power constraints. A theoretical square relation between power and center frequency agrees well with experimental results. The sixth-order differential bandpass filter chip occupies 2 mm/sup 2/ using a 2.25- mu m gate double-poly CMOS technology. >
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