Abstract

A 1 Mb content-addressable memory LSI based on flash technologies (flash CAM) has memory cells consisting of a pair of flash memory cell transistors. 10.34 /spl mu/m/sup 2/ cell and 42.9mm/sup 2/ die are attained with 0.8 /spl mu/m design rules. The flash CAM can be searched for masked binary data. Read access time and search access time are 115 ns and 145 ns, respectively, with a 5 V supply voltage. Power dissipation is 200 mW at 3.3 MHz. The flash CAM cell consists of two floating-gate transistors. This structure is in strong contrast to the comparator-added-storage structure of 17-transistor SRAM-based cells or five-transistor two-capacitor of DRAM-based cells. In addition to non-volatility, flash CAMs also feature on-board programmable/erasable memory.

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