Abstract
In this paper, a novel track and hold circuit in 0.35um SiGe BiCMOS process is presented. Compared to the traditional one, several improvements are made on the proposed track and hold circuit. At first, multistage architecture is used, which has better isolation. Secondly, a saturation protection circuit is designed into the track and hold circuit to prevent the NPN transistor from getting into saturation state. The simulation results show that the proposed track and hold circuit has a SFDR of 82dB and SNR of 76dB at the sampling rate of 1.25Gsps. Further simulation proved that the proposed track and hold circuit has better performances than the traditional one.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.