A 1.17-Megapixel CMOS Image Sensor With 1.5 A/D Conversions per Digital CDS Pixel Readout and Four In-Pixel Gain Steps

Abstract

This paper presents a low-power $1232\,\,\times \,\, 952$ pixel back side-illuminated CMOS image sensor with a pixel pitch of 2.8 $\mu \text{m}$ . It is implemented in a 90-nm CMOS image sensor technology. We propose a method to reduce the pixel readout energy consumption by computing two digital correlated double-sampling (DCDS) results with three analog–digital (A/D) conversions, thereby using an average of 1.5 A/D conversions per pixel. The conventional DCDS readout requires two A/D conversions per pixel. The DCDS operation uses 27.3 pJ/pixel and achieves a figure-of-merit (FoM) of 0.064 $\,\,\text {nJ}\cdot \text {e}^{-}$ , which is the lowest published to date. A pixel is designed with four gain steps that allow 175 $\mu \text{V}/\text{e}^{-}$ conversion gain and 2.33 e− read noise at the highest pixel gain setting and 33.400 e− full well capacity at the lowest pixel gain setting. The pixel design avoids the need for dedicated capacitors in the pixel and instead uses capacitance already existing in the current readout row and the previous row.