A 0.3-V Energy-Efficient Low-Noise CMOS OTA for Portable Bioelectric Signal Acquisition Systems

Abstract

This paper presents a low-voltage, ultra-low power, and low-noise operational transconductance amplifier (OTA) designed in 180-nm CMOS process. The OTA consists of two amplifying stages and a feed forward compensating path designed to provide a high differential gain while suppressing the common-mode input signal, thereby providing a high common-mode rejection ratio (CMRR). In this OTA, the entire transistors are biased in subthreshold region to allow for an ultra-low power consumption. According to the open loop simulation results, the circuit provides a low-frequency gain of 61 dB, CMRR of 110 dB, power supply rejection ratio (PSRR) of 69.6 dB, and phase margin of 57° for a 1-pF differential load capacitor. Using a capacitive feedback, the closed loop gain is set to 37.8 dB, and the 3-dB bandwidth is 8.33 kHz. The input-referred noise integrated from 250 Hz to 10 kHz is 4.2 μV <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</inf> , while the circuit draws only 420 nA from a 0.3 V supply, corresponding to a noise efficiency factor (NEF) of 1.17. The proposed OTA is a suitable candidate for energy-efficient biomedical applications such as neural recording amplifiers, action potential detectors, and portable ECG monitoring systems.