Abstract
A multimodal PAM4/NRZ transceiver, including adaptive ultra-wide range receiver and power noise stabilized transmitter, is proposed. The multimodal receiver features wide-range phase detector to optimize jitter tolerance for each speed while supporting both clock-forward and clock-embedded mode. An adaptive CDR controller selects the optimum CDR mode according to transmitter jitter performance to reduce power consumption while ensuring interoperability. The multimodal transmitter features PAM4 emphasis driver and stabilizer, which are applied for reducing distortion impact and power induced jitter. A test chip was fabricated in 28nm CMOS process and achieved 0.25–27Gb/s wide-range operation, and it achieves 33% power reduction compared to conventional architecture without the adaptive controller, resulting in 3.8pJ/bit energy efficiency for TX and 6.2pJ/bit for RX.
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