Abstract

A configurable long integer multiplier tailored to subthreshold operation is presented for ultra-low-power asymmetric en/decryption in semi-passive or passive systems. The multiplier is composed of radix-4 booth de/encoders and two ${544\times 16}$ -bit partial product reduction tree arrays and reconfigurable data paths. The architecture can be configured for multiple multiplications with different bit size. Novel 6–2 compressors are applied to the reduction tree with 4–2 compressors. The tree can compresses 16 bit products and carry-ins into 1 bit sum and carry within the delay of 6 XOR gates. Innovatively, a novel custom ratioed logic style is adopted in critical logic paths to fundamentally speed up the subthreshold operation. Fabricated in 65-nm CMOS, the proposed design indicates competent subthreshold operation. It can operate at 0.35-V supply with throughput of 376 Mb/s, with power consumption of 20.8 ${\mu }\text{W}$ in 1024-bit (modular) multiplication.

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