Abstract
AbstractAn area‐efficient low‐noise amplifier with extensive voltage gain variation in the frequency range of 0.3 to 5 GHz is proposed. The designed amplifier comprises of two stages of inverter cells, where by utilizing a resistance shunt feedback, the first stage makes the appropriate voltage gain and input impedance matching, and the second stage increases the bandwidth of the circuit utilizing an active floating inductor. Self‐forward‐body‐bias structure is employed in the presented work for reducing power consumption and improving the overall circuit performance. High voltage gain, low power consumption, wide frequency range of operation, lack of physical inductor, and consequently small occupied active area are among the most important features of the proposed circuit. The presented amplifier has been designed and simulated in standard 90‐nm and 0.18‐μm technologies with 0.9‐ and 1.2‐V supply voltages, respectively, in which important specifications are reported for 90‐nm complementary metal–oxide semiconductor (CMOS) process in details. Power consumption of the designed amplifier is 8.8 mW in 90‐nm technology with a flat variable voltage gain of −22 to 21.2 dB. The circuit consumes silicon area of 122 × 112 μm2, and in the high‐gain mode, the simulated S11 parameter is less than −10 dB, noise figure is almost 3.2 dB, and the IIP3 is equal to −4 dBm.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
More From: International Journal of Circuit Theory and Applications
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.