9.45 mW 3–9 GHz receiver front-end with excellent stop-band rejection for ultra-wideband systems using 0.18 [micro sign]m CMOS technology

Abstract

A low-power 3–9 GHz receiver front-end with excellent stop-band rejection by 0.18 µm CMOS technology is demonstrated. High stop-band rejection is achieved by using a pre-filter with three finite-transmission zeros, one of which (ωz1=0.9 GHz) is in the low-frequency stop-band and the other two (ωz2 and ωz4) are in the high-frequency stop-band. In the low-gain (LG) mode, the receiver front-end consumes 9.45 mW and achieves high and flat conversion gain (CG) of 25.7±1.5 dB, noise figure (NF) of 6.95 dB, and input third-order intercept point (IIP3) of −8 dBm. To the author's knowledge, this is the lowest-power dissipation (PD) ever reported for a 0.18 mm CMOS receiver front-end with NF smaller than 7 dB, average CG greater than 25 dB and bandwidth wider than or equal to 6 GHz. In the high-gain (HG) mode, the receiver front-end consumes 19.5 mW and achieves high and flat CG of 32.7±1.6 dB, NF of 6.78 dB and IIP3 of −13.5 dBm. In addition, in both the LG and HG modes, the receiver front-end achieves stop-band rejection better than 30 dB for frequencies DC∼1.5 GHz and larger than 12 GHz.