8-Bit Quantizer for Chaotic Generator With Reduced Hardware Complexity

Abstract

This article describes how nowadays, data is widely transmitted over the internet in the real time. Wherever the transmission or storage is required, security is needed. High speed processing hardware machine with reduced complexity are used for the security of the data, that are transmitted in real time. The information which is to be secure are encoded by pseudorandom key. Chaotic numbers are used in place of a pseudorandom key. The generated chaotic values are analogous in nature, these analog values are digitized to generate encryption key like 8-bit, 16-bit, 32-bit. To generate an 8-bit key, an 8-bit quantizer is required. The design of 8-bit quantizer requires 256 levels which needs lot of complex hardware to implement. In this article, an 8-bit quantizer is designed with reduced complexity, where hardware requirement is reduced by more than 12 times. Without compromising the randomness of the sequence generated. To increase the randomness and confusion timed hop random selection is used. The randomness of the sequence generated by the chaotic generators is analyzed by NIST test suite, to test for its randomness.