76- to 81-GHz CMOS Built-In Self-Test With 72-dB C/N and Less Than 1 ppm Frequency Tolerance for Multi-Channel Radar Applications

Abstract

A built-in self-test (BIST) system with a 72-dB carrier-to-noise ratio (C/N) and less than 1-ppm frequency tolerance of down-converted BIST tone for a multi-channel radar application is presented. The BIST consists of a frequency doubler, an up-conversion mixer (UPMIX), a variable gain amplifier, a phase shifter, an eight-way splitter, and an RF PAD coupler for BIST signal distribution. The proposed BIST system can operate from 76 to 81 GHz, mixing with arbitrary offset frequencies from 600 kHz to 42.7 MHz generated by a fully-synchronized phase locked loop (PLL). The proposed UPMIX can generate zero or non-zero offset frequencies by switching between two modes flexibly implemented in the same layout area. The measured relative phase among all eight channels was less than 2° from −25 °C to 150 °C through on-chip 12-bit analog-to-digital converters (ADCs). The proposed BIST was fabricated using a 40-nm CMOS process and assembled with a wafer-level chip-sized package (WLCSP). Also, state-of-the-art BIST beamformer analyses were demonstrated as one of the future methods for self-diagnosis with a null-depth monitoring for a multi-channel radar application.