7 - RISC type processors

Abstract

This chapter discusses the reduced instruction set computer (RISC) type processors. One disadvantage of the complex instruction set computer (CISC) design is that the central processing unit (CPU) is much more complex and, therefore, the required chip is larger and more expensive to manufacture. A second problem is that the instructions take several cycles of CPU time for execution which reduces processing speed especially in programs which involve a large amount of calculation and little input–output activity. An alternative design approach which has become popular in recent years is the RISC design. In the RISC technique, the number of instructions is reduced to those that are most frequently used in programs. The RISC processors normally have only two instructions, LOAD and STORE, which access the memory and the number of addressing modes provided is smaller than for a CISC machine. RISC processors are characterized by high instruction execution rates that are measured in millions of instructions per second. They are particularly useful in calculation of intensive programs which include a large number of repetitive operations.