66 GHz bias‐dependent equivalent circuit model for CMOS transistor based on 90 nanometers CMOS technology

Abstract

AbstractA 66 GHz bias‐dependent transistor model is established in this paper. A small signal equivalent circuit model, which contains transistor intrinsic effects, parasitic effects, and substrate coupling, is presented. Based on this, the nonlinear drain‐source current model and gate capacitance equations are established to represent their bias‐dependent characteristics. To validate the model, a transistor with gate width of 650 × 8 nm and gate length of 0.1 μm is fabricated in 90‐nm CMOS technology. Then, both the DC and small signal performances of the proposed model are investigated under different bias conditions. Good agreements between calculation and measurement results are achieved, which indicates that this model is accurate and reliable for millimeter wave application.