Abstract

Low‐temperature polycrystalline silicon (LTPS) thin‐film transistor devices can be used as core components of pixel driving circuits for active matrix organic light‐emitting displays (AMOLED). Poly silicon (P‐Si) film and device performance directly affects the display effect. This paper investigates polysilicon grain boundary reduction for LTPS devices on PI substrates, exploring the effects of grain boundary reduction on LTPS devices and image sticking. Reduction of polysilicon grain boundaries through optimization of a‐Si deposition process, a‐Si two‐step deposition and excimer laser annealing (ELA) doublescan process, ELA double‐scan process reduces grain boundaries by 67 %. We prepared LTPS devices with thinner gate interlayers (GI) based on P‐Si grain boundary reduction, LTPS devices with positive threshold voltage bias and increased mobility, AMOLED displays with thinner GI can have 23% better image sticking.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.