60-GHz Integrated Transmitter Development in 90-nm CMOS

Abstract

In this study, two 60-GHz single-chip CMOS transmitters have been fully integrated in a standard 90-nm CMOS process, focusing on low-power and high-performance applications, respectively. The low-power transmitter lineup consists of a push-push voltage-controlled oscillator (VCO), a single-gate up-conversion mixer, and a low-power three-stage power amplifier. The high-performance transmitter lineup consists of a cross-coupled VCO, a double-balanced Gilbert-cell up-conversion mixer with an on-chip Marchand balun, and a high linearity three-stage power amplifier. Measured performances of both the VCOs exhibit a wide tuning range of more than 2 GHz. The low-power single-gate up-converter provides a conversion loss of 8.4 dB, as compared to 4-dB conversion loss for the double-balanced Gilbert-cell up-converter, with 28-mW lower power consumption. The high-performance transmitter provides a total gain of more than 12 dB, with the power amplifier achieving 17-dB small-signal gain, and delivers +8.6-dBm saturated output power at 63 GHz for total power consumption of 112 mW. The low-power transmitter lineup provides a gain of 8.4 dB with a 5.7-dBm saturated output power for a 30% lower power consumption, and hence, presents an excellent tradeoff in terms of overall gain, output power, and total power consumption. After evaluating performances of these two lineups, an optimum lineup has been chosen where a double-balanced Gilbert-cell up-converter and Marchand balun of high-performance lineup are replaced by a dual-gate up-converter. This optimum transmitter front-end lineup delivers same performance as high-performance transmitter lineup, but with 10% reduced size and reduced total power consumption of 94 mW. All the designs have been optimized for robustness against process variation and temperature, and verified by measurement results. Transmitters achieve a 3-dB RF bandwidth exceeding 8 GHz (57-65 GHz).