5.7 GHz low-power variable-gain LNA in 0.18 [micro sign]m CMOS

Abstract

A variable-gain low-noise amplifier (LNA) suitable for low-voltage and low‐power operation is designed and implemented in a standard 0.18 µm CMOS technology. With a current-reused topology, the common-source gain stages are stacked for minimum power dissipation while achieving high small-signal gain. The fully integrated 5.7 GHz LNA exhibits 16.4 dB gain, 3.5 dB noise figure and 8 dB gain tuning range with good input and output return losses. The LNA consumes 3.2 mW DC power from a supply voltage of 1 V. A gain/power quotient of 5.12 dB/mW is achieved in this work.